ILLIAC II

The concept, proposed in 1958, pioneered Emitter-coupled logic (ECL) circuitry, pipelining, and transistor memory with a design goal of 100x speedup compared to ILLIAC I. ILLIAC II had 8192 words of core memory, backed up by 65,536 words of storage on magnetic drums.[1] A "fast buffer" was also provided for storage of short loops and intermediate results (similar in concept to what is now called cache).[2] The results were immortalized for more than a decade on a UIUC Postal Annex cancellation stamp, and were discussed in the New York Times, recorded in the Guinness Book of World Records, and described in a journal paper in Mathematics of Computation.By this time the hundreds of modules were obsolete scrap; many faculty members took components home to keep.His family donated 10 of these modules and the front panel to the University of Illinois CS department in 2006.
ILLIAC II Modules in April 2005. Liam W. Gillies (grandson of Donald B. Gillies) shows off 8 circuit modules.
ILLIAC II Control Panel in April 2005
University of IllinoisEmitter-coupled logicILLIAC Icore memorymagnetic drumsFloating-pointInstructionsStretchtransistorized computersSRT Division algorithmDonald B. GilliesSpeed-Independent CircuitryDavid E. MullerC-elementMersenne primeNew York TimesGuinness Book of World RecordsMathematics of ComputationORDVACILLIAC IIIILLIAC IVMainframesSILLIACWEIZACBESM-6PS-2000ElbrusIAS familyILLIACAVIDACIBM 701JOHNNIACORACLEMANIAC IMANIAC IIMISTICMUSASINO-1EDB-2/3CycloneHarvard UniversityHarvard Mark IHarvard Mark IIHarvard Mark IIIHarvard Mark IV305 RAMACAN/FSQ-7AN/FSQ-8University of PennsylvaniaUNIVAC IRemingtonSperry RandUNIVAC IIComputers built 1955 through 1978RaytheonRAYDACColossus computerTransistor computerVacuum-tube computerHistory of computing hardwareHistory of computing hardware (1960s–present)List of pioneers in computer science