12-bit computing

In computer architecture, 12-bit integers, memory addresses, or other data units are those that are 12 bits (1.5 octets) wide.Also, 12-bit central processing unit (CPU) and arithmetic logic unit (ALU) architectures are those that are based on registers, address buses, or data buses of that size.Possibly the best-known 12-bit CPUs are the PDP-8 and its descendants (such as the Intersil 6100 microprocessor), which were produced in various forms from August 1963 to mid-1990.12 binary digits, or 3 nibbles (a 'tribble'), have 4096 (10000 octal, 1000 hexadecimal) distinct combinations.IBM System/360 instruction formats use a 12-bit displacement field which, added to the contents of a base register, can address 4096 bytes of memory in a region that begins at the address in the base register.
bit slicingApplicationBinary floating-pointprecisionDecimal floating-pointcomputer architectureintegersmemory addressescentral processing unitarithmetic logic unitregistersaddress busesdata busessix-bit character codesIntersil 6100analog to digital convertersPIC microcontrollershexadecimalword-addressableSystem/360Digital Equipment CorporationDECmatePDP-12PDP-14Toshiba TLCS-12IntersilIM6100Control Data CorporationCDC 160 seriesCDC 6600National Cash RegisterNCR 315Scientific Data SystemsNuclear Data, Inc.PC12 minicomputerFerranti ArgusLINC-812-bit wide cluster entriesProcessor technologiesModelsAbstract machineStored-program computerFinite-state machinewith datapathHierarchicalDeterministic finite automatonQueue automatonCellular automatonQuantum cellular automatonTuring machineAlternating Turing machineUniversalPost–TuringQuantumNondeterministic Turing machineProbabilistic Turing machineHypercomputationZeno machineStack machineRegister machinesCounterPointerRandom-accessRandom-access stored programArchitectureMicroarchitectureVon NeumannHarvardmodifiedDataflowTransport-triggeredCellularEndiannessMemory accessLoad–storeRegister/memoryCache hierarchyMemory hierarchyVirtual memorySecondary storageHeterogeneousFabricMultiprocessingCognitiveNeuromorphicInstruction setarchitecturesOrthogonal instruction setApplication-specificVISC architectureQuantum computingComparisonAddressing modesMotorola 68000 seriesPDP-11Stanford MIPSMIPS-XPowerPCPower ISAClipper architectureSuperHDEC AlphaETRAX CRISUnicoreItaniumOpenRISCRISC-VMicroBlazez/ArchitectureOthersExecutionInstruction pipeliningPipeline stallOperand forwardingClassic RISC pipelineHazardsData dependencyStructuralControlFalse sharingOut-of-orderScoreboardingTomasulo's algorithmReservation stationRe-order bufferRegister renamingWide-issueSpeculativeBranch predictionMemory dependence predictionParallelismBit-serialInstructionPipeliningScalarSuperscalarThreadProcessVectorMemoryDistributedMultithreadingTemporalSimultaneousHyperthreadingSimultaneous and heterogenousPreemptiveCooperativeFlynn's taxonomyArray processing (SIMT)ProcessorperformanceTransistor countInstructions per cycleCycles per instructionInstructions per secondFloating-point operations per secondTransactions per secondSynaptic updates per secondPerformance per wattCache performance metricsComputer performance by orders of magnitudeGraphics processing unitBarrelStreamTile processorCoprocessorMulti-chip moduleSystem in a packagePackage on a packageEmbedded systemMicroprocessorMicrocontrollerMobileUltra-low-voltageSoft microprocessorSystem on a chipMultiprocessorCypress PSoCNetwork on a chipHardwareacceleratorsAI acceleratorImage processorVision processing unitPhysics processing unitDigital signal processorTensor Processing UnitSecure cryptoprocessorNetwork processorBaseband processorWord size15-bit16-bit24-bit32-bit48-bit64-bit128-bit256-bit512-bitSingle-coreMulti-coreManycoreHeterogeneous architectureCPU cacheScratchpad memoryData cacheInstruction cachereplacement policiescoherenceClock rateClock signalFunctionalunitsAddress generation unitFloating-point unitMemory management unitLoad–store unitTranslation lookaside bufferBranch predictorBranch target predictorIntegrated memory controllerInstruction decoderCombinationalSequentialLogic gateProcessor registerStatus registerStack registerRegister fileMemory bufferMemory address registerProgram counterControl unitHardwired control unitInstruction unitData bufferWrite bufferMicrocodeDatapathMultiplexerDemultiplexerMultiplierBinary decoderAddress decoderSum-addressed decoderBarrel shifterCircuitryIntegrated circuitMixed-signalPower managementBooleanDigitalAnalogPowermanagementDynamic frequency scalingDynamic voltage scalingClock gatingHistory of general-purpose CPUsMicroprocessor chronologyProcessor designDigital electronicsHardware security moduleSemiconductor device fabricationTick–tock modelPin grid arrayChip carriercomputer hardware