POWER6
It is claimed to be part of the eCLipz project, said to have a goal of converging IBM's server hardware where practical (hence "ipz" in the acronym: iSeries, pSeries, and zSeries).The binary floating-point unit incorporates "many microarchitectures, logic, circuit, latch and integration techniques to achieve [a] 6-cycle, 13-FO4 pipeline", according to a company paper.[10] POWER6 can connect to up to 31 other processors using two inter node links (50 GB/s), and supports up to 10 logical partitions per core (up to a limit of 254 per system).There is an interface to a service processor that monitors and adjusts performance and power according to set parameters.[11] IBM also makes use of a 5 GHz duty-cycle correction clock distribution network for the processor.The main difference between the Express and Enterprise models is that the latter include Capacity Upgrade on Demand (CUoD) capabilities and hot-pluggable processor and memory "books".
clock rateTechnology nodeInstruction setPower ISAPOWER5POWER7PowerPCQorivvaPOWER1POWER2POWER3POWER4POWER8POWER9Power10RAD6000RAD750RAD5500BroadwayEspressoPWRficientOpenPOWER FoundationAIM allianceBlue GenePower.orgAltiVecmicroprocessoriSeriespSerieszSeriesInternational Solid-State Circuits Conferencedual-coresimultaneous multithreadingout-of-orderViVA-2vector processorinteger unitsbinaryfloating-point unitsdecimalIEEE 754floating-pointSystem z10L2 cacheL3 cacheDr Frank SoltisPower 560 and 570mainframe processorsPower Systemsblade serversBladeCenterIBM Power microprocessorsmainframeVance, AshleeThe RegisterInformationWeekHeinz HeiseEE TimesIT WeekArs TechnicaIBM Journal of Research and DevelopmentCiteSeerXMicroprocessor Report