HyperTransport
HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors.HyperTransport has also been used by IBM and Apple for the Power Mac G5 machines, as well as a number of modern MIPS systems.Intel technologies require each speed range of RAM to have its own interface, resulting in a more complex motherboard layout but with fewer bottlenecks.With the advent of version 3.1, using full 32-bit links and utilizing the full HyperTransport 3.1 specification's operating frequency, the theoretical transfer rate is 25.6 GB/s (3.2 GHz × 2 transfers per clock cycle × 32 bits per link) per direction, or 51.2 GB/s aggregated throughput, making it faster than most existing bus standard for PC workstations and servers as well as making it faster than most bus standards for high-performance computing and networking.HyperTransport 3.0 added scrambling and receiver phase alignment as well as optional transmitter precursor deemphasis.For instance, a Pentium cannot be plugged into a PCI Express bus directly, but must first go through an adapter to expand the system.The proprietary front-side bus must connect through adapters for the various standard buses, like AGP or PCI Express.Add to that 802.11ac 8 antennas and the WiGig 60 GHz standard (802.11ad) and HyperTransport becomes more feasible (with anywhere between 20 and 24 lanes used for the needed bandwidth).The issue of latency and bandwidth between CPUs and co-processors has usually been the major stumbling block to their practical implementation.Current generation FPGAs from both main manufacturers (Altera and Xilinx) directly support the HyperTransport interface, and have IP Cores available.AMD started an initiative named Torrenza on September 21, 2006, to further promote the usage of HyperTransport for plug-in cards and coprocessors.Infinity Fabric (IF) is a superset of HyperTransport announced by AMD in 2016 as an interconnect for its GPUs and CPUs.[7][8][9] The company said the Infinity Fabric would scale from 30 GB/s to 512 GB/s, and be used in the Zen-based CPUs and Vega GPUs which were subsequently released in 2017.
Hyper-Threadingprocessorsserialparallelbandwidthlatencypoint-to-point linkHyperTransport Consortiumsystem buscentral processing unitsAthlon 64AMD FXmotherboardPower Mac G5ULLtraDIMMfront-side busdouble data rateclock signal32-bit16-bitperipheralslow-voltage differential signalingdeemphasispacketuniform memory accessdirect memory accesspower managementAdvanced Configuration and Power InterfacePentiumPCI ExpressnorthbridgesouthbridgeOpteronAthlon IISempron 64Turion 64PhenomPhenom IImultiprocessorcache coherencyAthlon 64 FXDual Socket Direct Connect (DSDC) ArchitectureHORUS interconnectNewisysroutersswitchesEthernetAlteraXilinxIP CoresTorrenzacoprocessorsQLogicAMD 480 seriesAMD 580 seriesAMD 690 seriesAMD 700 seriesAMD 800 seriesAMD 900 seriesRadeon Xpress 200Radeon Xpress 3200BroadcomServerWorksOpenCoresLoongsonNvidianForcenForce2nForce 3nForce 4nForce 500 seriesnForce 600 seriesnForce 700 seriesnForce 900 seriesPMC-SierraTransmetaAthlon 64 X2SempronTurionnForce3Pentium 4Intel CoreHeterogeneous System ArchitectureUALinkElastic interface busFibre ChannelIntel QuickPath InterconnectList of interface bit ratesRapidIOTechnicalde facto standardscomputer busesBack-side busDaisy chainControl busAddress busBus contentionBus masteringNetwork on a chipPlug and playSS-50 busS-100 busMultibusUnibusSTD BusEurope Card BusSTEbusZorro IIZorro IIIFASTBUSHP Precision BusTURBOchannelHP GSC busInfiniBandPCI Extended (PCI-X)PCI Express (PCIe)Compute Express Link (CXL)Direct Media Interface (DMI)NVLinkInfinity FabricIntel Ultra Path InterconnectCoherent Accelerator Processor Interface (CAPI)SpaceWireST-506Parallel ATA (PATA)Bus and Tag